/*
 * Project Name: RFlink.cyfx
 * Time : 01/20/2013 22:51:22
 * Device Type: FX3
 * Project Type: GPIF2
 *
 *
 *
 *
 * This is a generated file and should not be modified
 * This file need to be included only once in the firmware
 * This file is generated by Gpif2 designer tool version - 1.0.837.1
 * 
 */

#ifndef _INCLUDED_CYFXGPIF2CONFIG_RF_
#define _INCLUDED_CYFXGPIF2CONFIG_RF_
#include "cyu3types.h"
#include "cyu3gpif.h"

/* Summary
   Number of states in the state machine
 */
#define CY_RFLINK_NUMBER_OF_STATES 10

/* Summary
   Mapping of user defined state names to state indices
 */
#define RFLINK_START 0x0
#define RFLINK_INIT 0x1
#define RFLINK_IF_RX_0 0x3
#define RFLINK_IF_RX_1 0x5
#define RFLINK_IF_TX_2 0x6
#define RFLINK_DONE 0x4
#define RFLINK_WAIT_0 0x2
#define RFLINK_IF_TX_3 0x9
#define RFLINK_IF_TX 0x7
#define RFLINK_IF_RX 0x8


/* Summary
   Initial value of early outputs from the state machine.
 */
#define RFLINK_ALPHA_START 0x80


/* Summary
   Transition function values used in the state machine.
 */
uint16_t Rflink_CyFxGpifTransition[]  = {
    0x0000, 0xAAAA, 0x5555, 0xCCCC, 0xFFFF, 0xEEEE, 0xFFF0
};

/* Summary
   Table containing the transition information for various states. 
   This table has to be stored in the WAVEFORM Registers.
   This array consists of non-replicated waveform descriptors and acts as a 
   waveform table. 
 */
CyU3PGpifWaveData Rflink_CyFxGpifWavedata[]  = {
    {{0x4E739C01,0x00001000,0x80000000},{0x00000000,0x00000000,0x00000000}},
    {{0x50806202,0x0000000C,0x80000000},{0x00000000,0x00000000,0x00000000}},
    {{0x1E706207,0x0C00C0C6,0x80000000},{0x1E702008,0x00010106,0x80000000}},
    {{0x4E739C04,0x00001000,0x80000000},{0x00000000,0x00000000,0x00000000}},
    {{0x2E739A06,0x08000000,0x80000000},{0x2E739A09,0x0C000000,0x80000000}},
    {{0x2E739A03,0x20000000,0x80000000},{0x2E739A05,0x24000000,0x80000000}}
};

/* Summary
   Table that maps state indices to the descriptor table indices.
 */
uint8_t Rflink_CyFxGpifWavedataPosition[]  = {
    0,1,2,3,1,3,3,4,5,3
};

/* Summary
   GPIF II configuration register values.
 */
uint32_t Rflink_CyFxGpifRegValue[]  = {
    0x800083B0,  /*  CY_U3P_PIB_GPIF_CONFIG */
    0x0000006C,  /*  CY_U3P_PIB_GPIF_BUS_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_BUS_CONFIG2 */
    0x00000052,  /*  CY_U3P_PIB_GPIF_AD_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_STATUS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INTR */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INTR_MASK */
    0x00000082,  /*  CY_U3P_PIB_GPIF_SERIAL_IN_CONFIG */
    0x00000782,  /*  CY_U3P_PIB_GPIF_SERIAL_OUT_CONFIG */
    0x55515500,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_DIRECTION */
    0x0000FF70,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_DEFAULT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_POLARITY */
    0x00000080,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_TOGGLE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000001,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000002,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000003,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000010,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000012,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000013,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000011,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000006,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_RESET */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_LIMIT */
    0x0000010A,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_RESET */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_LIMIT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_STATE_COUNT_CONFIG */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_STATE_COUNT_LIMIT */
    0x0000010A,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_RESET */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_LIMIT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COMP_VALUE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COMP_MASK */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COMP_VALUE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COMP_MASK */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COMP_VALUE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COMP_MASK */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_CTRL */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x80010400,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x80010401,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x80010402,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x80010403,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_LAMBDA_STAT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ALPHA_STAT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_BETA_STAT */
    0x00800000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_CTRL_STAT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_SWITCH */
    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_SWITCH_TIMEOUT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CRC_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CRC_DATA */
    0xFFFFFFC1  /*  CY_U3P_PIB_GPIF_BETA_DEASSERT */
};

/* Summary
   This structure holds all the configuration inputs for the GPIF II. 
 */
const CyU3PGpifConfig_t Rflink_CyFxGpifConfig  = {
    (uint16_t)(sizeof(Rflink_CyFxGpifWavedataPosition)/sizeof(uint8_t)),
    Rflink_CyFxGpifWavedata,
    Rflink_CyFxGpifWavedataPosition,
    (uint16_t)(sizeof(Rflink_CyFxGpifTransition)/sizeof(uint16_t)),
    Rflink_CyFxGpifTransition,
    (uint16_t)(sizeof(Rflink_CyFxGpifRegValue)/sizeof(uint32_t)),
    Rflink_CyFxGpifRegValue
};

#endif   /* _INCLUDED_CYFXGPIF2CONFIG_ */
