   The current Alpha chips don't provide hardware for integer
   division.  The C compiler expects the functions

        __divqu: 64-bit unsigned long divide
        __remqu: 64-bit unsigned long remainder
        __divq/__remq:   signed 64-bit
        __divlu/__remlu: unsigned 32-bit
        __divl/__reml:   signed 32-bit

   These are not normal C functions: instead of the normal calling
   sequence, these expect their arguments in registers t10 and t11, and
   return the result in t12 (aka pv).  Register AT may be clobbered
   (assembly temporary), anything else must be saved.

   Furthermore, the return address is in t9 instead of ra.

   Normal function	Divide functions
   ---------------	----------------
   v0 ($0)		t12/pv ($27)
   a0 ($16)		t10 ($24)
   a1 ($17)		t11 ($25)
   ra ($26)		t9 ($23)
